发明名称 Multi-layer sensor chip assembly and method for imaging generating image data with a frame-sum mode and a time-delay integration mode
摘要 An integrated circuit for generating image data comprises a focal-plane array of unit cells, a controller, and a memory structure having a plurality of storage locations. Each unit cell may store charge based on detected photons. The controller may read a value based on the stored charge from at least some of the unit cells, and either add the read value to an existing value in the corresponding storage location when operating in frame-sum mode, or add the read value to an existing value in a shifted storage location when operating in time-delay integration (TDI) mode. This may allow faint objects as well as objects moving in the field-of-view of the focal-plane array to be observed. The integrated circuit may be fabricated from radiation-hardened CMOS technology and may be a layer of a sensor chip assembly.
申请公布号 US8629387(B2) 申请公布日期 2014.01.14
申请号 US20100831694 申请日期 2010.07.07
申请人 PFLIBSEN KENT P.;VANCE LEONARD D.;MCCOMAS BRIAN KEITH;RAYTHEON COMPANY 发明人 PFLIBSEN KENT P.;VANCE LEONARD D.;MCCOMAS BRIAN KEITH
分类号 H01L27/00;H04N3/14 主分类号 H01L27/00
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