发明名称 |
Method of, and apparatus for, data path optimisation in parallel pipelined hardware |
摘要 |
A method of generating a hardware design for a pipelined parallel stream processor, by defining a hardware processing operation; specifying at least one propagation rule; defining a graph representing the processing operation in the time domain, comprising at least one data path to be implemented as a hardware design and a plurality of parallel branches; each data path having: at least one data path input, output, and discrete object corresponding to a hardware element; each discrete object comprises an input for receiving an input variable, an operator for executing a function on said input variable, and an output variable; optimizing each output from each discrete object in dependence upon the propagation rule to produce an optimised graph; and utilizing the optimised graph to define an optimised hardware design for implementation in said pipelined parallel stream processor. |
申请公布号 |
US8631380(B2) |
申请公布日期 |
2014.01.14 |
申请号 |
US201113305261 |
申请日期 |
2011.11.28 |
申请人 |
PELL OLIVER;BOWER JACOB ALEXIS;BERRY RICHARD;BACH STEFAN ROLF;KADLCEK OLIVER;MAXELER TECHNOLOGIES, LTD. |
发明人 |
PELL OLIVER;BOWER JACOB ALEXIS;BERRY RICHARD;BACH STEFAN ROLF;KADLCEK OLIVER |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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