发明名称 Junction leakage reduction through implantation
摘要 Provided is a method of fabricating a semiconductor device. The method includes forming a first III-V family layer over a substrate. The first III-V family layer includes a surface having a first surface morphology. The method includes performing an ion implantation process to the first III-V family layer through the surface. The ion implantation process changes the first surface morphology into a second surface morphology. After the ion implantation process is performed, the method includes forming a second III-V family layer over the first III-V family layer. The second III-V family layer has a material composition different from that of the first III-V family layer.
申请公布号 US8629013(B2) 申请公布日期 2014.01.14
申请号 US201113273463 申请日期 2011.10.14
申请人 NIEH CHUN-FENG;YU CHUNG-YI;LIN HUNG-TA;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 NIEH CHUN-FENG;YU CHUNG-YI;LIN HUNG-TA
分类号 H01L21/338 主分类号 H01L21/338
代理机构 代理人
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