发明名称 Memory circuit, memory unit, and signal processing circuit
摘要 A memory circuit includes a transistor having a channel in an oxide semiconductor layer, a capacitor, a first arithmetic circuit, a second arithmetic circuit, a third arithmetic circuit, and a switch. An output terminal of the first arithmetic circuit is electrically connected to an input terminal of the second arithmetic circuit. The input terminal of the second arithmetic circuit is electrically connected to an output terminal of the third arithmetic circuit via the switch. An output terminal of the second arithmetic circuit is electrically connected to an input terminal of the first arithmetic circuit. An input terminal of the first arithmetic circuit is electrically connected to one of a source and a drain of the transistor. The other of the source and the drain of the transistor is electrically connected to one of a pair of electrodes of the capacitor and to an input terminal of the third arithmetic circuit.
申请公布号 US8630130(B2) 申请公布日期 2014.01.14
申请号 US201213429574 申请日期 2012.03.26
申请人 KUROKAWA YOSHIYUKI;SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 KUROKAWA YOSHIYUKI
分类号 G11C7/10 主分类号 G11C7/10
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