发明名称 Emphasis circuit and transmitter
摘要 An emphasis circuit includes: an applying circuit to add an emphasis signal to an input differential signal; a feedback path to feed back a differential output of the applying unit; a comparing circuit to compare a direct current component level of a positive phase signal and of a negative phase signal of the differential signal; a direct current component level controlling circuit to control a direct current component level of at least one of the positive phase signal and the negative phase signal; a delay unit circuit to add a delay to at least one of the fed-backed differential signal to generate the emphasis signal and inputs the emphasis signal into the applying unit; and a dummy load coupled to a positive phase signal output or a negative phase signal output of the applying unit.
申请公布号 US8630369(B2) 申请公布日期 2014.01.14
申请号 US201213609562 申请日期 2012.09.11
申请人 TSUNODA YUKITO;FUJITSU LIMITED 发明人 TSUNODA YUKITO
分类号 H04L25/03;H04L25/49 主分类号 H04L25/03
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