| 摘要 |
An electronic device includes a memory control circuit that controls a DRAM, and the memory control circuit performs: a first distributed refresh process for issuing refresh commands to the DRAM at a predetermined interval so that storage elements of which the DRAM is configured are refreshed at least once in a predetermined period Ts; a concentrated refresh process for issuing, triggered by a predetermined request to the DRAM, a predetermined number of times Nc of the refresh commands in a burst at an interval that is shorter than the predetermined interval; and a second distributed refresh process for, when the predetermined number of times Nc of refresh commands have been issued, calculating a refresh interval Tr for refreshing remaining storage elements that have not yet been refreshed in the predetermined period Ts and issues refresh commands at the calculated refresh interval Tr. |
