SYSTEM FOR CONTROLLING DATA OUTPUT WITH DYNAMIC ZERO BALANCING

摘要

FIELD: information technology.SUBSTANCE: apparatus includes a data memory register, a digital-to-analogue converter, an input bus, an output bus, a pulse former, a comparator, a selector, first and second two-input AND logic elements, a bidirectional counter, a sampling/storage device, an additional digital-to-analogue converter and an additional input bus.EFFECT: reduced errors caused by destabilising factors.1 dwg