| 摘要 |
PROBLEM TO BE SOLVED: To shorten a test time by preventing a scan test pattern from being reloaded to a pattern memory in a scan test of a semiconductor device.SOLUTION: A scan test method comprises, in a scan test to a semiconductor device, causing a computer to perform the steps of: generating a plurality of scan shift clock signals different in a skew; dividing a plurality of scan flip flops included in a scan path into a plurality of sets in accordance with the number of the scan shift clock signals and allocating the plurality of scan shift clock signals to the scan flip flop included in each of the plurality of sets; generating a scan test pattern to the scan flip flop included in any one set of the plurality of sets; and adjusting the number of the scan shift clock signals such that a pattern length of the scan test pattern is equal to or less than a pattern memory size of a tester. |
