发明名称 |
EFFICIENT HARDWARE INSTRUCTIONS FOR SINGLE INSTRUCTION MULTIPLE DATA PROCESSORS |
摘要 |
A method and apparatus for efficiently processing data in various formats in a single instruction multiple data ("SIMD") architecture is presented. Specifically, a method to unpack a fixed-width bit values in a bit stream to a fixed width byte stream in a SIMD architecture is presented. A method to unpack variable-length byte packed values in a byte stream in a SIMD architecture is presented. A method to decompress a run length encoded compressed bit-vector in a SIMD architecture is presented. A method to return the offset of each bit set to one in a bit-vector in a SIMD architecture is presented. A method to fetch bits from a bit-vector at specified offsets relative to a base in a SIMD architecture is presented. A method to compare values stored in two SIMD registers is presented. |
申请公布号 |
US2014013077(A1) |
申请公布日期 |
2014.01.09 |
申请号 |
US201314023249 |
申请日期 |
2013.09.10 |
申请人 |
ORACLE INTERNATIONAL CORPORATION |
发明人 |
GANESH AMIT;CHAVAN SHASANK K.;MARWAH VINEET;KAMP JESSE;PATTHAK ANINDYA C.;GLEESON MICHAEL J.;HOLLOWAY ALLISON L.;MACNICOL ROGER |
分类号 |
G06F15/80 |
主分类号 |
G06F15/80 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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