发明名称 |
OPTIMIZED FLASH MEMORY WITHOUT DEDICATED PARITY AREA AND WITH REDUCED ARRAY SIZE |
摘要 |
A method and system for optimizing flash memory without dedicated parity area and with reduced array size. The memory size of a multi level cell (MLC) flash is reduced and controller operation is simplified. Simplified operation includes the controller being able to program each host data page to an integer number of flash pages. A maximal available information bits per cell (IBPC) is maintained in a flash device while also maximizing the programming throughput of the flash. Features include the ability to dynamically select which number of cell states is used by flash memory cells. |
申请公布号 |
US2014013033(A1) |
申请公布日期 |
2014.01.09 |
申请号 |
US201113806007 |
申请日期 |
2011.06.21 |
申请人 |
SHARON ERAN;ALROD IDAN;LITSYN SIMON;SANDISK IL LTD. |
发明人 |
SHARON ERAN;ALROD IDAN;LITSYN SIMON |
分类号 |
G06F12/02 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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