发明名称 FIELD SIDE SUB-BITLINE NOR FLASH ARRAY, AND METHOD OF FABRICATING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a field side sub-bitline NOR flash array, and a method of fabricating the same.SOLUTION: A field side sub-bitline NOR flash array forms field side sub-bitlines by utilizing impurity of the same type as source/drain electrodes of memory cells. The field side sub-bitlines are connected to source/drain electrodes of a plurality of memory cells along the two side walls of field trench oxide. Each field side sub-bitline is connected to a corresponding main bitline through a contact provided at a twisted point in the middle. Because there are no contacts in the connected source/drain electrodes of the memory cells, the wordline pitch and the bitline pitch correspond to the minimum shape of a specific semiconductor process technology node. The field side sub-bitline NOR-type flash array has a high cell area density.
申请公布号 JP2014003043(A) 申请公布日期 2014.01.09
申请号 JP20120117420 申请日期 2012.05.23
申请人 FLASHSILICON INC 发明人 O RITSUCHU
分类号 H01L21/8247;H01L21/336;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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