发明名称 LATERAL INSULATED GATE BIPOLAR TRANSISTOR STRUCTURE WITH LOW PARASITIC BJT GAIN AND STABLE THRESHOLD VOLTAGE
摘要 A metal-oxide-semiconductor laterally diffused device (HV LDMOS), particularly a lateral insulated gate bipolar junction transistor (LIGBT), and a method of making it are provided in this disclosure. The device includes a silicon-on-insulator (SOI) substrate having a drift region, two oppositely doped well regions in the drift region, two insulating structures over and embedded in the drift region and second well region, a gate structure, and a source region in the second well region over a third well region embedded in the second well region. The third well region is disposed between the gate structure and the second insulating structure.
申请公布号 US2014008723(A1) 申请公布日期 2014.01.09
申请号 US201213543662 申请日期 2012.07.06
申请人 LIN LONG-SHIH;HUANG KUN-MING;LIN MING-YI;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LIN LONG-SHIH;HUANG KUN-MING;LIN MING-YI
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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