<p>A delay circuit and a semiconductor apparatus which includes the delay circuit are provided. An output control circuit controls an output signal level from an output terminal to a High level or a Low level or controls the output terminal such that it is brought into a High impedance state. A delay time setting circuit discharges a capacitance in response to a control signal from a logical operation circuit and generates a delay time setting signal based on a voltage across the capacitance. The logical operation circuit controls the output control circuit such that the output terminal is brought into the High impedance state in response to a detection signal and outputs the control signal to the delay time setting circuit, and controls the output control circuit such that a Low level output signal is output in response to the delay time setting signal.</p>
