发明名称 DA CONVERSION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To suppress the dispersion of output current and to reduce an error by arranging the logic circuit parts in an m-row/n-column matrix form and preparing (m×n) pieces of MOS transistors TR to set a desired logical conversion function based on the connection or non-connection to the collector wiring of every source. SOLUTION: The base of a TR Q21 of a reference current source 2 is directly connected to the bases of conversion TR Q11 to Q16 of a conversion part 1 with no intervention of any switch. The current continuity cut-off control of the TR Q11 to Q16 are carried out by a switch matrix consisting of MOS TR M11 to M16, M21 to M26 and M31 to M36. The logical conversion of an optional input digital number into a pure binary number from stages S1 to S3 is preset by setting previously the connection or non-connection to the collectors of the TR Q11 to Q16 corresponding to the sources of the TR M11 to M16, M21 to M26 and M31 to M36 of a logic circuit part 3.
申请公布号 JPH10163876(A) 申请公布日期 1998.06.19
申请号 JP19960317605 申请日期 1996.11.28
申请人 NEC YAMAGATA LTD 发明人 HIRASAWA SHINICHI
分类号 H03M1/10;H03K19/177;H03M1/74;(IPC1-7):H03M1/74 主分类号 H03M1/10
代理机构 代理人
主权项
地址