发明名称 Integrated circuit with stacked sub-circuits between Vcc and ground so as to conserve power and reduce the voltage across any one transistor
摘要 The semiconductor integrated circuit device of the present invention includes a plurality of integrated circuits. The scheduling circuit selects an arbitrary number of integrated circuit from the plurality of integrated circuits, and connects the selected integrated circuits between the power line and the ground line such that the selected integrated circuits are arranged in series or in series-parallel. The scheduling circuit sets a combination of connection of the selected integrated circuits such that the consumption power of the total of the selected integrated circuits becomes minimum. The voltage control circuit sets a potential of a serial connecting portion of the selected integrated circuits. The data control circuit has an input output circuit for inputting and outputting data between the selected integrated circuits, and the outside, and a level conversion circuit for converting a level of data between certain integrated circuits.
申请公布号 US5867040(A) 申请公布日期 1999.02.02
申请号 US19960593275 申请日期 1996.01.29
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 FUSE, TSUNEAKI;OOWAKI, YUKIHITO
分类号 G11C11/407;G11C5/14;H01L21/822;H01L27/04;H03K19/00;(IPC1-7):H03K19/00;H01L25/00 主分类号 G11C11/407
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