| 摘要 |
PROBLEM TO BE SOLVED: To suppress power supply/ground bounce of a CMOS circuit by reducing a parasitic inductance caused by the length of a bonding wire connecting a semiconductor chip with an interconnection board for BGA. SOLUTION: An on-chip conductor film 12 is provided on the electrode arranging face of a semiconductor chip 10 and a shortest distance power supply connection is made via the path route of a power supply signal electrode from among many on-chip electrodes 11→a wire 13 between the chip and the conductor film→the on-chip conductor film 12→a wire 14 between the chip and a power supply plane(PP) 2p→and the PP. Shortest-distance ground connection is also made via a path of a ground signal electrode→a wire 15 between the chip and a ground plane(GP) 2g. Remaining general signal electrodes are connected through wire bonding with a general signal line 2S1 in a region remote from the semiconductor chip 10. |
