发明名称
摘要 PROBLEM TO BE SOLVED: To provide a FIFO data readout device that allows a plurality of CPUs to read out, in a mutually independent manner, data stored in one FIFO circuit. SOLUTION: A FIFO readout circuit 20 handles a readout request made by a CPU 2 and a CPU 4 to a FIFO circuit 12. When the total count of readouts for the FIFO circuit 12 by the CPU 2 is more than the total count of readouts by the CPU 4, the FIFO readout circuit 20 reads out data from the FIFO circuit 12, transmits it to the CPU 2, and writes it to a DPRAM 32 for the CPU 4. When the total count of readouts by the CPU 2 is less than the total count of readouts by the CPU 4, the FIFO readout circuit 20 reads out data from a corresponding address position in a DPRAM 30 and outputs it to the CPU 2 because the data corresponding to the readout request made by the CPU 2 to the FIFO circuit 12 has already been transmitted to the CPU 4 and written to the DPRAM 30 for the CPU 2. COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP5381919(B2) 申请公布日期 2014.01.08
申请号 JP20100156753 申请日期 2010.07.09
申请人 发明人
分类号 G06F12/00;G06F15/167 主分类号 G06F12/00
代理机构 代理人
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