发明名称 Semiconductor devices and methods for manufacturing the same
摘要 In a method for manufacturing a semiconductor device in which wiring layers are formed by a damascene method, certain embodiments relate to a manufacturing method and a semiconductor device, in which a bonding pad section having a multiple-layered structure can be formed by a simple method without increasing the number of process steps. One embodiment includes a method for manufacturing a semiconductor device in which at least an uppermost wiring layer is formed by a damascene method. The method includes the following steps of: (a) forming an uppermost dielectric layer 22 in which an uppermost wiring layer is formed; (b) forming a wiring groove for the wiring layer having a specified pattern and an opening section for bonding pad section in the uppermost dielectric layer 22; (c) forming a first conduction layer for the wiring layer; (d) forming a second conduction layer over the first conduction layer, the second conduction layer composed of a different material from a material of the first conduction layer; and (e) planarizing the second conduction layer, the first conduction layer and the dielectric layer, to thereby form a wiring layer 62 composed of the first conduction layer in the wiring groove and a base conduction layer 82 composed of the first conduction layer and an exposed conduction layer 84 composed of the second conduction layer in the opening section for bonding pad section.
申请公布号 US2001039111(A1) 申请公布日期 2001.11.08
申请号 US20010775474 申请日期 2001.02.03
申请人 MOROZUMI YUKIO 发明人 MOROZUMI YUKIO
分类号 H01L23/52;H01L21/3205;H01L21/60;H01L21/768;H01L23/485;H01L23/532;(IPC1-7):H01L21/44;H01L21/476 主分类号 H01L23/52
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