发明名称 Redundancy design with electro-migration immunity and method of manufacture
摘要 An IC interconnect for high direct current (DC) that is substantially immune to electro-migration (EM) damage, and a method of manufacture of the IC interconnect are provided. A structure includes a cluster-of-via structure at an intersection between inter-level wires. The cluster-of-via structure includes a plurality of vias each of which are filled with a metal and lined with a liner material. At least two adjacent of the vias are in contact with one another and the plurality of vias lowers current loading between the inter-level wires.
申请公布号 US8624395(B2) 申请公布日期 2014.01.07
申请号 US201213400900 申请日期 2012.02.21
申请人 HSU LOUIS L.;MURRAY CONAL E.;WANG PING-CHUAN;YANG CHIH-CHAO;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 HSU LOUIS L.;MURRAY CONAL E.;WANG PING-CHUAN;YANG CHIH-CHAO
分类号 H01L23/48 主分类号 H01L23/48
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