发明名称 Flexible sequence design architecture for solid state memory controller
摘要 In some implementations, a method includes receiving commands from a host device, sending the commands to one or more flash memory devices, receiving information associated with at least one of the commands from the one or more flash memory devices, and selectively sending the information to the host device based on whether one or more parameters in the at least one command include a request to receive the information from the one or more flash memory devices.
申请公布号 US8626995(B1) 申请公布日期 2014.01.07
申请号 US201213595616 申请日期 2012.08.27
申请人 YOON TONY;SHIN HYUNSUK;LEE CHI-KONG;MARVELL INTERNATIONAL LTD. 发明人 YOON TONY;SHIN HYUNSUK;LEE CHI-KONG
分类号 G06F13/14 主分类号 G06F13/14
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