| 发明名称 |
High speed processing of financial information using FPGA devices |
| 摘要 |
A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) receive the financial market data messages, and (2) parse each received financial market data message into its constituent data fields. |
| 申请公布号 |
US8626624(B2) |
申请公布日期 |
2014.01.07 |
| 申请号 |
US201113076982 |
申请日期 |
2011.03.31 |
| 申请人 |
PARSONS SCOTT;TAYLOR DAVID E.;SCHUEHLER DAVID VINCENT;FRANKLIN MARK A.;CHAMBERLAIN ROGER D.;IP RESERVOIR, LLC |
发明人 |
PARSONS SCOTT;TAYLOR DAVID E.;SCHUEHLER DAVID VINCENT;FRANKLIN MARK A.;CHAMBERLAIN ROGER D. |
| 分类号 |
G06Q40/00 |
主分类号 |
G06Q40/00 |
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