发明名称 Method and device of controlling memory area of multi-port memory device in memory link architecture
摘要 A memory area managing method of a multi-port memory device in a memory link architecture which includes a multi-port memory device, a memory controller, and a flash memory, the method including performing a data processing step in which data stored in a host CPU area of the multi-port memory device is processed by a host CPU connected with the multi-port memory device, the processed data being stored in a shared area; performing a file data generating step in which file data on the processed data stored in the shared area is generated according to a write command of the host CPU, the file data being stored in a memory controller area of the multi-port memory device; and performing a file data storing step in which the file data is read out from the memory controller area and the read file data is sent to the flash memory.
申请公布号 US8627019(B2) 申请公布日期 2014.01.07
申请号 US201113323918 申请日期 2011.12.13
申请人 YANG JUNG WOONG;SAMSUNG ELECTRONICS CO., LTD. 发明人 YANG JUNG WOONG
分类号 G06F12/00 主分类号 G06F12/00
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