| 摘要 |
According to an embodiment of the present invention, a thin film transistor array panel includes: an insulating substrate; a plurality of gate lines formed on the insulating substrate; a plurality of repairing lines formed on the same layer as the gate lines; a gate insulating layer formed on the gate lines and the repairing lines; a plurality of data lines formed on the gate insulating layer; a plurality of drain electrodes separated from the data lines and formed on the gate insulating layer; a passivation layer formed on the data lines and the drain electrodes; and a plurality of pixel electrodes formed on the passivation layer and connected to the drain electrodes, wherein the data lines include a first and a second data lines and a connecting bridge therebetween. |
