| 摘要 |
PROBLEM TO BE SOLVED: To provide a scan flip flop circuit which enables testing thereof correctly free from a problem of contention attributed to a clock skew. SOLUTION: A circuit has a master latch circuit (2) for scanning added to a normal flip flop circuit comprising a master latch circuit (1) and a slave latch circuit (3). A control circuit (16) is provided at the part of the slave latch circuit (3) to enable controlling of the master and slave latching operations by two independent clocks. Thus, the contention attributed to the clock skew can be checked by a two-phase timing control.
|
