METHOD FOR MANAGING COHERENCE, COHERENCE MANAGEMENT UNIT, CACHE DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

摘要

A method for managing coherence of a plurality of cache memories, which are respectively connected to a plurality of cores provided in a multi-core semiconductor device and respectively include a plurality of cache lines in which data are stored, comprises the steps of: receiving a request signal from one among the cores; extracting a partial tag from an address of the request signal; comparing the extracted partial tag with partial tag sets which are a part of the tag information of a plurality of tag memories which store a copy of tag information and line status information stored in each of the cache memories; and, based on the comparison result, selectively accessing the tag memories and, based on whether a first cache line in which requested data corresponding to the request signal are stored exists, providing the requested data to a second cache line within a cache memory connected to a core which provides the request signal.