发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To increase the degree of integration of a nonvolatile semiconductor memory device by directly reducing the occupied area with peripheral circuits. <P>SOLUTION: A memory cell of an AND type flash memory is composed of a selector gate, a floating gate, a control gate functioning as a word line WL and an n-type semiconductor region (source/drain) functioning as a local bit line BL. A pair of mutually adjacent local bit lines BL in a memory mat MM are connected to one global bit line GBL at one end of the memory mat MM in its columnar direction. To each of the pair of local bit lines BL a selection MOS transistor composed of one enhancement type MOS transistor (STE) and one depression type MOS transistor (STD) is connected in series to select either of the local bit lines BL by turning on/off the selection MOS transistor. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005209914(A) 申请公布日期 2005.08.04
申请号 JP20040015369 申请日期 2004.01.23
申请人 RENESAS TECHNOLOGY CORP 发明人 KANEMITSU KENJI;ADACHI TETSUO;KATO MASATAKA;HARAGUCHI KEIICHI
分类号 G11C11/34;G11C16/04;G11C16/06;G11C16/24;H01L21/8239;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 G11C11/34
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