发明名称 Maintaining cache coherency for secure and non-secure data access requests
摘要 A cache in a data processing apparatus has a status field associated with each entry in the cache to store a security value indicative of whether the data stored in that entry are secure data, non-secure data or aliased data. Secure data are only accessible in response to a secure data access request, non-secure data are only accessible in response to a non-secure data access request and aliased data are accessible in response to either a secure or a non-secure data access request. The data processing apparatus also has bus fabric which provides security data in response to a bus access request, the security data being indicative of whether the bus access request is to a storage location designated as secure, non-secure or aliased.
申请公布号 US2008072004(A1) 申请公布日期 2008.03.20
申请号 US20060523808 申请日期 2006.09.20
申请人 ARM LIMITED 发明人 KERSHAW DANIEL
分类号 G06F12/14;G06F12/00 主分类号 G06F12/14
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