发明名称 |
Clock data recovery system |
摘要 |
A clock data recovery system is described. It includes a high pass filter for transmitting a filtered data signal in response to receiving an input data signal; an adder for summing the filtered data signal with a feedback signal, wherein the adder produces a summed input signal; a plurality of clocked data comparators for receiving the summed input signal, wherein the clocked data comparators determine an input data bit value; a plurality of clocked error comparators for receiving an error signal associated with clock recovery; an equalization and adaptation logic for selecting an error sample such that a phase associated with the error sample is locked at a second post cursor; and a phase mixer for transmitting a delay in response to receiving the phase and the delay is transmitted to the clocked-data comparators and the clocked-error comparators. |
申请公布号 |
US8619934(B2) |
申请公布日期 |
2013.12.31 |
申请号 |
US20100854883 |
申请日期 |
2010.08.11 |
申请人 |
LEE HAE-CHANG;FELDMAN ARNOLD ROBERT;JOY ANDREW;TEXAS INSTRUMENTS INCORPORATED |
发明人 |
LEE HAE-CHANG;FELDMAN ARNOLD ROBERT;JOY ANDREW |
分类号 |
H04L7/00;H04L25/00;H04L25/40 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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