| 摘要 |
A clock generator with comparator error compensation includes an amplifier which develops an error voltage based on a difference between a sample voltage of a charge voltage and a predetermined reference voltage. The charge voltage develops a clock signal, such as a sawtooth waveform. A comparator compares the charge voltage with the error voltage to develop a compare signal. A sample and discharge control network is operative to develop the sample voltage in response to the compare signal, and then to switch between charging and discharging of the charge voltage. The amplifier develops the error voltage to ensure that the charge voltage switches at a level of the reference voltage to eliminate comparator errors, such as switching delay or input offset voltage. A second comparator and another amplifier may be provided to control switching in both directions, such as for developing a triangular waveform or the like. |
