发明名称 Static random-access memory having read circuitry with capacitive storage
摘要 Integrated circuits may have arrays of memory elements. Data may be loaded into the memory elements and read from the memory elements using data lines. Address lines may be used to apply address signals to write address transistors and read circuitry. A memory element may include a bistable storage element. Read circuitry may be coupled between the bistable storage element and a data line. The read circuitry may include a data storage node. A capacitor may be coupled between the data storage node and ground and may be used in storing preloaded data from the bistable storage element. The read circuitry may include a transistor that is coupled between the bistable storage element and the data storage node and a transistor that is coupled between the data storage node and the data line.
申请公布号 US8619464(B1) 申请公布日期 2013.12.31
申请号 US201113219537 申请日期 2011.08.26
申请人 SINHA SHANKAR;WONG BRIAN;LEE SHIH-LIN S.;SHARMA ABHISHEK;ALTERA CORPORATION 发明人 SINHA SHANKAR;WONG BRIAN;LEE SHIH-LIN S.;SHARMA ABHISHEK
分类号 G11C11/00 主分类号 G11C11/00
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