发明名称 |
Self-biased voltage regulation circuitry for memory |
摘要 |
Integrated circuits with voltage regulation circuitry are provided. Voltage regulation circuitry may be powered by a core supply voltage and may not have a bandgap reference circuit. Voltage regulation circuitry may have an error amplifier in a negative feedback configuration. The error amplifier may have inputs connected to reference voltages generated by resistor strings. The resistor strings may be trimmable to provide a desired negative voltage. The desired negative voltage may be fed to the gates of transistors to help reduce leakage. The desired negative voltage may be have improved tolerance to process-voltage-temperature variations and may improve the reliability of transistors. |
申请公布号 |
US8618786(B1) |
申请公布日期 |
2013.12.31 |
申请号 |
US20090551289 |
申请日期 |
2009.08.31 |
申请人 |
PERISETTY SRINIVAS;SHERIGAR ARVIND;ALTERA CORPORATION |
发明人 |
PERISETTY SRINIVAS;SHERIGAR ARVIND |
分类号 |
G05F3/16;G11C5/14;G11C11/00 |
主分类号 |
G05F3/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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