| 摘要 |
A dual resistor ladder DAC includes a coarse ladder including a plurality of coarse ladder resistors and a fine ladder including a plurality of MOS transistors coupled between first and second conductors. A first group of parallel-connected bit-shifting transistors is coupled between the first and third conductors. A second group of parallel-connected MOS bit-shifting transistors is coupled between the third and top conductors. A third group of parallel-connected bit-shifting transistors is coupled between bottom and fourth conductors. A fourth group of parallel-connected bit-shifting transistors is coupled between the second and fourth conductors. Parallel-connected bit-shifting transistors are turned either on or off in response to a plurality of bit-switching bits of a binary number to be converted. One of the bottom, first, second, third, and top conductors is coupled to a DAC output conductor in response to the plurality of bit-switching bits. |
