发明名称 Fast power-on bias circuit
摘要 Conventional bias circuits exhibit a number of limitations, including the time required to power-up a bias circuit following a low-power state. Large current surges in the supply network induce ringing, further complicating a power-up process. Example embodiments reduce power-up time and minimize current surges in the supply by selectively charging and discharging capacitance to the circuit during power-up and power-down of the bias circuit.
申请公布号 US8618869(B2) 申请公布日期 2013.12.31
申请号 US201113341483 申请日期 2011.12.30
申请人 DETTLOFF WAYNE;WILSON JOHN;LUO LEI;LEIBOWITZ BRIAN;ZERBE JARED;VENKATESAN PRAVIN KUMAR;RAMBUS INC. 发明人 DETTLOFF WAYNE;WILSON JOHN;LUO LEI;LEIBOWITZ BRIAN;ZERBE JARED;VENKATESAN PRAVIN KUMAR
分类号 G05F1/10 主分类号 G05F1/10
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