发明名称 DELAY CONTROL CIRCUIT AND CLOCK GENERATING CIRCUIT INCLUDING THE SAME
摘要 A delay control circuit includes an update pulse selection part, a first update pulse generation part, and a second update pulse generation part. The first update pulse generation part responds to one among a power voltage detection signal and a calibration signal and enables one among a first and a second control signal. The first update pulse generation part receives the first control signal and generates a first update pulse. The second update pulse generation part receives the second control signal and generates a second update pulse of which pulse width is wider than that of the first update pulse. [Reference numerals] (11) Delay line;(110) Phase comparison part;(12) Delay modeling part;(120) Phase detection part;(15) Delay line control part;(16) Clock driver;(200) Multi-update signal generation part
申请公布号 KR20130142743(A) 申请公布日期 2013.12.30
申请号 KR20120066238 申请日期 2012.06.20
申请人 SK HYNIX INC. 发明人 JANG, JAE MIN;KIM, YONG JU;KWON, DAE HAN;CHOI, HAE RANG
分类号 G11C7/22 主分类号 G11C7/22
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