| 摘要 |
A memory system according to an embodiment of the present invention comprises: a memory controller for controlling interleaving access operations on first and second memories; a first processor for providing an address for using the first or second memory; and linear address remapping logic for remapping the address received from the modem processor and providing the memory controller with the remapped address, wherein the memory controller performs a linear access operation on the first or second memory according to the remapped address. In a memory system using an interleaving access operation, the present invention can perform a partial linear access operation by adding linear access remapping logic at a front stage of a specific processor (e.g., modem). In this manner, power consumption can be reduced. |
