发明名称 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
摘要 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE AND METHOD OF MANUFACTURE THEREOFAn integrated circuit packaging system and method of manufacture thereof includes: a substrate having a top insulation layer and a top conductive layer; an inter-react layer on the substrate; an integrated circuit die on the substrate; a package body on the inter-react layer and the integrated circuit die; and a top solder bump on the top conductive layer, the top solder bump in a 3D via formed through the package body, the inter-react layer, and the top insulation layer for exposing the top conductive layer in the 3D via.(Fig.2)
申请公布号 SG195464(A1) 申请公布日期 2013.12.30
申请号 SG20130034814 申请日期 2013.05.07
申请人 STATS CHIPPAC LTD 发明人 YAOJIAN LIN;IL KWON SHIM;JUNMO KOO;JOSE ALVIN CAPARAS
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