发明名称 Scalable system for simulation and emulation of electronic circuits using asymmetrical evaluation and canvassing instruction processors
摘要 A scalable system for verifying electronic circuit designs in anticipation of fabrication by compiling a hardware description to instructions for canvassing processors and instructions for circuit evaluation processors which are scalably interconnected to provide simulation and emulation, having deterministically scheduled transfer of circuit signal values among the large number of circuit evaluation processors.
申请公布号 US7548842(B2) 申请公布日期 2009.06.16
申请号 US20060307198 申请日期 2006.01.26
申请人 发明人
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址