| 摘要 |
The present invention provides a high-end fault-tolerant computer system and an implementation method. The system includes N single junction prototype verification systems and M crossbar-switch interconnection router chipsets. Each crossbar-switch interconnection router chipset is used to achieve the interconnection among the N single junction prototype verification systems. Switching is not performed among all crossbar-switch interconnection router chipsets, and both M and N are positive integers greater than or equal to 2. The single junction includes: a computer board, which is 4-path tightly-coupled computer board, and a junction controller for controlling 2 paths of CPUs on the computer board. The present invention can effectively realize the global memories sharing, balance the system transmission bandwidth and delay, and solve the problem of the integration reliability of multi-path CPU system. |
