| 摘要 |
PROBLEM TO BE SOLVED: To provide an SRAM with an improved write margin and a low power supply voltage without reduction in cell stability.SOLUTION: A second power supply terminal (47) receives a second power supply voltage from a word line (WWL0) during a write operation of a cross-coupled inverter (40), and receives a first power supply voltage during a read operation of the cross-coupled inverter. When write of a logic high into a memory cell (20') is completed, a word line (WWL0) becomes a logic high. The cross-coupled inverter comprises: a first inverter, which comprises a first output terminal and a first input terminal that is coupled to a first storage node (SN); and a second inverter, which comprises a second input terminal coupled to the first output terminal, and a second output terminal that is coupled at the first storage node (SN) to the first input terminal. A first access transistor (60) and a second access transistor (62) are PMOSFETs. |
