发明名称 CIRCUIT AND METHOD ABOUT SLEEP STATE LEAKAGE CURRENT REDUCTION
摘要 PROBLEM TO BE SOLVED: To reduce leakage current in a sleep state.SOLUTION: A circuit 100 for reducing leakage current in a sleep state includes a latch, a flip-flop, a comparator, a multiplexer, or a hardware unit 102 selected from one among adders. The hardware unit 102 includes a first node 110, and further includes a sleepable combination logic 104 in which the value of the first node is stored during a sleep state, and the hardware unit is connected to the first node.
申请公布号 JP2013257891(A) 申请公布日期 2013.12.26
申请号 JP20130156067 申请日期 2013.07.26
申请人 QUALCOMM INC 发明人 MARTIN SAINT-LAURENT;JEN-TSUNG LIN
分类号 G06F1/32 主分类号 G06F1/32
代理机构 代理人
主权项
地址