发明名称 CAPACTIVE LOAD PLL WITH CALIBRATION LOOP
摘要 A circuit includes a capacitive-load voltage controlled oscillator having an input configured to receive a first input signal and an output configured to output an oscillating output signal. A calibration circuit is coupled to the voltage controlled oscillator and is configured to output one or more control signals to the capacitive-load voltage controlled oscillator for adjusting a frequency of the oscillating output signal. The calibration circuit is configured to output the one or more control signals in response to a comparison of an input voltage to at least one reference voltage.
申请公布号 US2013342247(A1) 申请公布日期 2013.12.26
申请号 US201213530136 申请日期 2012.06.22
申请人 CHERN CHAN-HONG;CHUNG TAO WEN;HUANG MING-CHIEH;LIN CHIH-CHANG;HUANG TSUNG-CHING;HSUEH FU-LUNG;TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHERN CHAN-HONG;CHUNG TAO WEN;HUANG MING-CHIEH;LIN CHIH-CHANG;HUANG TSUNG-CHING;HSUEH FU-LUNG
分类号 H03L7/08 主分类号 H03L7/08
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