发明名称
摘要 <p>A cross point variable nonvolatile memory device includes a memory cell array including: first memory cells (e.g., part of a memory cell array) having a common word line; and second memory cells (e.g., another part of the memory cell array or a compensation cell unit). When a predetermined memory cell among the first memory cells is written to by changing the predetermined memory cell to a first resistance state, a word line write circuit supplies a first voltage or a first current to a selected word line, a first bit line write circuit supplies a third voltage or a third current to one bit line of the first memory cells, and a second bit line write circuit supplies the third voltage or the third current to A bit line or lines of the second memory cells.</p>
申请公布号 JP5379316(B2) 申请公布日期 2013.12.25
申请号 JP20130012587 申请日期 2013.01.25
申请人 发明人
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项
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