发明名称 Method of manufacturing vertical transistors
摘要 A method of manufacturing vertical transistors includes steps of: forming a conductive layer on the surface of a substrate with a ditch and two support portions; removing the conductive layer on the bottom wall of the ditch and top walls of the support portions via anisotropic etching through a etch back process; forming an oxidized portion in the ditch; and etching the conductive layer to form two gates without contacting each other. By forming the conductive layer on the surface of the ditch and adopting selective etching of the etch back process, the problem of forming sub-trenches caused by lateral etching or uneven etching rate that might otherwise occur in the conventional etching process is prevented, and the risk of damaging metal wires caused by increasing etching duration also can be averted.
申请公布号 US8613861(B2) 申请公布日期 2013.12.24
申请号 US201113313566 申请日期 2011.12.07
申请人 CHEN HSIAO-CHIA;LIANG SHENG-CHANG;TSAI CHIEN-HUA;OHUCHI MASAHIKO;REXCHIP ELECTRONICS CORPORATION 发明人 CHEN HSIAO-CHIA;LIANG SHENG-CHANG;TSAI CHIEN-HUA;OHUCHI MASAHIKO
分类号 H01B13/00 主分类号 H01B13/00
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