发明名称 Common drain exposed conductive clip for high power semiconductor packages
摘要 One exemplary disclosed embodiment comprises a semiconductor package including multiple transistors having a common drain coupled to an exposed conductive clip. A driver integrated circuit (IC) may control the transistors for various power applications. By exposing a top surface of the exposed conductive clip outside of a mold compound of the package, enhanced thermal performance is provided. Additionally, the conductive clip provides a short distance, high current carrying route between transistors of the package, providing higher electrical performance and reduced form factor compared to conventional designs with individually packaged transistors.
申请公布号 US8614503(B2) 申请公布日期 2013.12.24
申请号 US201113111904 申请日期 2011.05.19
申请人 CHO EUNG SAN;INTERNATIONAL RECTIFIER CORPORATION 发明人 CHO EUNG SAN
分类号 H01L23/02 主分类号 H01L23/02
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