发明名称 |
Migrating execution of thread between cores of different instruction set architecture in multi-core processor and transitioning each core to respective on / off power state |
摘要 |
Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system. |
申请公布号 |
US8615647(B2) |
申请公布日期 |
2013.12.24 |
申请号 |
US20080220092 |
申请日期 |
2008.07.22 |
申请人 |
HUM HERBERT;SPRANGLE ERIC;CARMEAN DOUG;KUMAR RAJESH;INTEL CORPORATION |
发明人 |
HUM HERBERT;SPRANGLE ERIC;CARMEAN DOUG;KUMAR RAJESH |
分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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