发明名称 Wiring method for semiconductor integrated circuit, semiconductor-circuit wiring apparatus and semiconductor integrated circuit
摘要 A wiring method for a semiconductor integrated circuit has the steps of, separately from a first layer on which a first signal wiring pattern is mainly formed, laying out a first power-supply wiring pattern on a second layer so that a plurality of rows of the first power-supply wiring pattern are regularly arranged with vacant areas each interposed between the rows and making narrower a width of each vacant area than a narrowest width of a row among the rows of the first power-supply wiring pattern, and laying out a second signal wiring pattern electrically conductive to the first layer in two or more rows of the vacant areas on the second layer so that the second signal wiring pattern is not in contact with adjacent rows of the first power-supply wiring pattern on both sides.
申请公布号 US8614515(B2) 申请公布日期 2013.12.24
申请号 US201113233996 申请日期 2011.09.15
申请人 UTSUMI TETSUAKI;KABUSHIKI KAISHA TOSHIBA 发明人 UTSUMI TETSUAKI
分类号 H01L29/40 主分类号 H01L29/40
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