Bit line sense amplifier layout array, layout method, and apparatus having the same

摘要

A bit line sense amplifier layout array includes N sense amplifier layout regions, which are arranged adjacent each other and have a sense amplifier, respectively. (N+1-i) bit lines and i complementary bit lines are arranged in an ith sense amplifier layout region among the sense amplifier layout regions. An ith bit line among the (N+1-i) bit lines and an ith complementary bit line among the i complementary bit lines are connected to a sense amplifier formed in the ith sense amplifier layout region. The values N and i are natural numbers and i>=1 and <=N.