| 摘要 |
A memory apparatus includes a plurality of first bit columns for constructing a common memory space and at least one reserve second bit column. A column address of a damaged first bit column is recorded as a predetermined column address. When a byte column is accessed, data recorded in the first bit columns and the second bit columns are respectively latched in a first latching device and a second latching device. In the event that the latched access data is accessed, data is outputted by comparing the predetermined column address of each first bit column and an access column address, and when the access column address matches with the predetermined column address, data is outputted via the second latching device; otherwise, the data is outputted via the first latching device. |
