发明名称
摘要 <p>A submount for a light emitting stack includes a substrate and a metallization layer having circuit traces and a planar dielectric layer that fills regions between the circuit traces. The planar dielectric layer serves to minimize the amount of light lost/absorbed by the substrate and preferably reflects the internally reflected light back toward the desired light output element. To facilitate efficient manufacture, a dielectric paste is applied over the metallized layer, then planed to expose at least portions of the metal conductors for the subsequent coupling to the light emitting stack. Pedestal elements are preferably provided at select locations on the circuit traces to facilitate this coupling while allowing the remainder of the circuit traces to be covered with the dielectric layer.</p>
申请公布号 JP2013545288(A) 申请公布日期 2013.12.19
申请号 JP20130533302 申请日期 2011.10.07
申请人 发明人
分类号 H01L33/60;H01L33/50;H01L33/62 主分类号 H01L33/60
代理机构 代理人
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