发明名称 NON-VOLATILE LOGIC GATE ELEMENT
摘要 The present invention is configured as a non-volatile logic gate element, having as one storage structure a resistor network in which at least three or more non-volatile resistor elements are connected, comprising: a reference resistor network which is a reference resistor with which the storage structure manifests resilience, with respect to a resistance value of the resistor network which forms the storage structure; a write unit which, when storing data in the resistor network, alternatively rewrites a value of each non-volatile resistor element which forms the resistor network as either a maximum or a minimum which is associated with a read-out logic value; and a logic circuit structure which employs as the logic value of the storage structure a value which is obtained by a comparison of the resistor network resistance value and the reference resistor network resistance value.
申请公布号 WO2013187193(A1) 申请公布日期 2013.12.19
申请号 WO2013JP64138 申请日期 2013.05.15
申请人 NEC CORPORATION;TOHOKU UNIVERSITY 发明人 NEBASHI, RYUSUKE;SAKIMURA, NOBORU;TSUJI, YUKIHIDE;TADA, AYUKA;SUGIBAYASHI, TADAHIKO;HANYU, TAKAHIRO;ENDOH, TETSUO;OHNO, HIDEO
分类号 H03K19/18;G11C11/15;H01L21/8246;H01L27/105;H01L29/82;H01L43/08 主分类号 H03K19/18
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